TSMC Weighs 3D DRAM Production at Nvidia's Request as AI Memory Supplies Tighten

A possible new role in the AI memory race

Taiwan Semiconductor Manufacturing Co. is considering making 3D DRAM at the request of Nvidia, its biggest customer, according to accounts published on November 6 and 7, 2026, citing two people familiar with the discussions. The proposal would take the world's largest contract chipmaker further into the memory needed to support artificial intelligence computing.

TSMC is weighing two routes: building a factory or buying an existing plant and converting it to memory production. Hsu Kuo-chin, the vice president responsible for advanced packaging technology development, is reportedly leading the work. He previously served as chairman of Micron Taiwan, bringing experience in memory manufacturing to his current responsibilities for integrating chips.

The discussions come as demand for AI hardware strains memory supplies and pushes prices higher. Nvidia is seeking additional suppliers, while Apple has also been looking for more memory sources and cited rising memory costs among the reasons for increasing some product prices earlier this year.

TSMC's public response has been to decline comment on market rumors or speculation and restate its focus on its core foundry business. The company says its mission remains supplying technology and manufacturing capacity to the global logic chip industry. TSMC and Nvidia did not immediately respond to requests for comment on the reported planning.

The central commercial issue is whether TSMC could move from making processors and helping connect them to memory into manufacturing the memory cells themselves. That would bring it into more direct competition with Samsung Electronics, SK hynix and Micron, while potentially giving its customers another way to secure a component that has become increasingly costly.

What would 3D DRAM change?

DRAM, short for dynamic random access memory, temporarily holds information that an electronic device needs while it is working. A processor uses it much like a person uses a desk: the information needed for the current task stays close at hand, rather than being fetched repeatedly from longer term storage.

Conventional DRAM arranges its memory cells across a horizontal plane. The 3D DRAM approach under consideration would place cells or layers of cells vertically, increasing the amount of information that can fit within a given chip footprint. The basic idea resembles adding floors to a building instead of expanding its ground area.

For AI hardware, capacity is only part of the requirement. Memory also needs to move information quickly enough to keep expensive processors busy. A chip that stores more data must still meet requirements for speed, power use, temperature and dependable operation.

DRAM also needs regular refreshing to preserve its stored information. A commercially useful design must manage that behavior while reading and writing data reliably. Those demands make the proposed move a manufacturing and engineering project, as well as a response to customers seeking more supply.

Why this differs from the HBM already used in AI

High bandwidth memory, or HBM, also uses a vertical structure, but at a different level. Manufacturers make separate DRAM chips, called dies, and stack them. Electrical connections passing through the silicon allow the dies to communicate, while advanced packaging connects the memory stack to a processor.

Cell stacking in 3D DRAM changes the arrangement within the memory device itself. HBM stacks separately manufactured dies; the proposed architecture stacks memory cells or tiers inside the device. Each approach creates its own production and integration requirements.

TSMC already participates in the HBM production chain. Its announced HBM4 collaboration with SK hynix covers base die performance and packaging for integrating memory with logic. The base die is the chip underneath the memory stack that handles connections and logic functions.

Nvidia's interest in TSMC's manufacturing technology also appeared in its reported NVHBM base die plans in October. Nvidia reportedly asked Samsung, SK hynix and Micron to use TSMC's 3 nanometer process for the base dies of its custom memory design. Under that arrangement, the memory companies would supply the memory dies while TSMC manufactured the specified logic component.

Producing the storage cells would add another responsibility to TSMC's existing role. For customers, the practical benefit would depend on a finished product's capacity, data transfer speed, power consumption and compatibility with their systems.

Why Nvidia wants more memory options

Nvidia's reported request reflects a supply problem extending beyond the processor itself. AI systems need both computing power and a steady flow of data. More processors create demand for the memory that feeds them, putting pressure on manufacturers to expand output.

Samsung, SK hynix and Micron are the major established suppliers that a TSMC memory business would face. An additional producer could eventually broaden customers' purchasing options, provided it could deliver products in sufficient quantities and meet their technical requirements.

Nvidia is also working to get complete AI systems into service faster. Its October announcement of the DSX POD design described seven computing racks containing 504 Rubin graphics processors in a container assembled and tested before shipment. Worldwide deliveries were planned for early 2027.

The connection is practical: a deployment plan needs all its components to arrive, including processors, memory, networking and cooling equipment. Expanding processor production and simplifying installation leave memory availability as another part of the delivery schedule.

Apple's search for additional memory sources shows that the pressure reaches consumer electronics too. Higher memory costs can affect the economics of phones, computers and other devices, alongside the large systems used for AI. Apple has already cited those costs as one factor behind some price increases.

Building a factory or converting one

TSMC's reported options involve either constructing new facilities for advanced memory or acquiring a plant and adapting it. Micron took the acquisition and conversion route earlier this year, buying a fabrication plant for conversion to DRAM production.

A fabrication plant, usually called a fab, produces chips on thin discs known as wafers. Converting one requires more than changing the product name: the equipment, processing steps and operating conditions must suit the memory design. A new plant also requires tools, infrastructure and time to bring production under control.

TSMC's existing expansion shows how far ahead factory decisions can run. Chairman and Chief Executive C. C. Wei announced on October 15 that the company would add another Tainan 3nm factory, targeting commercial production in the first half of 2028. A previously planned Tainan project was expected to begin mass production in the first half of 2027.

The proposed memory work remains at the planning stage. A factory location, investment budget, wafer production target, commercial product, customer qualification and production date have not been publicly identified. Nvidia's intended application for the memory also remains undisclosed, leaving customers without a delivery schedule or a specified product to assess.

Why the executive leading the work matters

Hsu's reported leadership connects two relevant areas of experience. His earlier position as chairman of Micron Taiwan placed him in the memory industry. At TSMC, his responsibilities include three dimensional integrated circuits and advanced packaging, technologies used to connect chips into larger computing systems.

Advanced packaging matters because a useful AI component must operate within a complete system. The connections between processors, memory and other chips affect how quickly data moves and how heat is managed. Manufacturing a dense memory device is one task; integrating it into a working product is another.

TSMC has previously participated in conventional memory manufacturing and holds patents relating to vertical DRAM. The reported initiative would therefore draw on some existing technical work as well as the company's packaging capabilities.

Samsung, SK hynix and Micron are also developing 3D DRAM technology. Any TSMC product would enter a field where established memory manufacturers are pursuing similar architectural changes while continuing to supply today's market.

The engineering work between a design and deliveries

Manufacturing vertically stacked memory involves making very deep, narrow structures and connecting different tiers accurately. Reliability across those structures is another challenge: the cells must retain information and perform repeated reads and writes under the conditions required by customers.

Manufacturing yield would be central to the economics. Yield is the share of chips produced on a wafer that work well enough to sell. A design can store more information in the same area yet remain expensive if too many devices fail during production.

Customer qualification adds another stage. Nvidia would need memory that meets the requirements of a particular system, including bandwidth, power, thermal behavior and packaging compatibility. Qualification is the testing and approval process that checks those requirements before a component enters commercial products.

Samsung's experience with vertically stacked NAND offers a historical comparison for how production milestones are documented. It introduced its first generation of V-NAND in 2013 and announced mass production of a second generation in October 2014. NAND is storage memory that retains data without power, whereas DRAM provides temporary working memory and needs refreshing. Their different operating requirements mean development schedules depend on different engineering work.

For buyers, the useful measure would be functioning, approved memory delivered in volume. Calculating that supply would require wafer production figures, capacity per chip, manufacturing yield and packaging output. Those are the numbers that would let customers assess the contribution of a new supplier.

How the developments fit together

October's announcements and the November accounts describe several connected efforts to support AI demand: more logic manufacturing, a greater TSMC role in memory base dies, faster system deployment and now consideration of memory cell production.

• October 15, 2026: TSMC announced another Tainan factory using its 3 nanometer process, with commercial production planned for the first half of 2028.
• October 18, 2026: Industry accounts described Nvidia's request for TSMC's 3 nanometer technology in NVHBM base dies supplied through Samsung, SK hynix and Micron.
• October 21, 2026: Nvidia announced DSX POD, with worldwide deliveries planned for early 2027.
• November 6 and 7, 2026: Accounts described TSMC's consideration of 3D DRAM manufacturing at Nvidia's request.

TSMC's American depositary receipts rose 7.6% in trading before the US market opened on November 6. The proposed business expansion would give investors another potential source of AI related revenue to consider, alongside the company's established processor manufacturing and packaging operations.

For Nvidia and other customers, the immediate concern remains obtaining enough suitable memory at a manageable cost. TSMC's reported planning introduces a possible additional manufacturing route, while its public position remains focused on the foundry business. The next concrete developments would be company decisions identifying a product, manufacturing capacity and customer approval.

Key Points

• TSMC is reportedly considering 3D DRAM manufacturing at Nvidia's request.
• The options include building a factory or buying and converting an existing plant.
• Vice President Hsu Kuo-chin, a former Micron Taiwan chairman, reportedly leads the work.
• Cell stacking in 3D DRAM differs from HBM's stacking of separately manufactured memory dies.
• TSMC says it does not comment on market speculation and remains focused on its core foundry business.
• A commercial product, factory commitment and production timetable have not been announced.
• A move into memory cell production would bring TSMC into more direct competition with Samsung, SK hynix and Micron.