DeepSeek and Huawei Target Nvidia Reliance With Chip Design Work and New AI Tools

DeepSeek Moves Closer to Huawei's Chip Roadmap

DeepSeek is reportedly helping shape Huawei's future artificial intelligence chips, with Huawei engineers working from the AI developer's offices and incorporating its requirements into processor designs. The collaboration reaches into two tasks that determine how quickly large AI systems can learn: performing calculations and moving data between chips.

The October 20, 2026 account, based on two anonymous people familiar with the work, describes a closer relationship than simply buying processors. DeepSeek plans to begin training models with Huawei's Ascend 950DT chips as early as the end of 2026, while Huawei reportedly intends to give it priority access to most of its next generation Ascend 960DT chips in the first quarter of 2027.

Huawei has already published a timetable for those newer processors. Its September technology announcement, issued at Huawei Connect in Shanghai, says the Ascend 960DT will be available in the first quarter of 2027 and the Ascend 960PR in the third quarter. Public confirmation of the reported chip design arrangement with DeepSeek is still pending.

The work builds on a partnership DeepSeek announced on September 30 to develop programming tools for Huawei processors. Together, the software project and reported hardware collaboration show how the companies are trying to make Chinese AI models and Chinese chips work more closely together, reducing their dependence on Nvidia's technology.

What DeepSeek Wants From the Hardware

Huawei engineers have reportedly spent an extended period at DeepSeek's offices, taking the company's needs and suggestions into account when making chip design decisions. Their work includes how models carry out calculations and how processors exchange information.

Training an AI model means repeatedly processing examples and adjusting the numerical settings that govern its responses. For a very large model, thousands of processors must share that work. A fast chip can spend valuable time waiting if information cannot move quickly enough between processors.

DeepSeek's involvement gives Huawei feedback from a company building demanding AI systems. Decisions about calculation methods, memory and communication can then be considered together, rather than leaving software developers to adapt to a finished processor.

DeepSeek continues to seek access to advanced Nvidia processors, according to the account of the collaboration. Its approach therefore combines work on a domestic alternative with efforts to obtain the hardware already central to advanced model training.

The Dates That Matter

Huawei's published schedule and DeepSeek's software announcement provide several concrete milestones. The reported plans for model training extend that sequence into 2027.

• September 17, 2026: Huawei announced its updated Ascend roadmap and Atlas 960E SuperPoD at Huawei Connect in Shanghai.
• September 30, 2026: DeepSeek announced programming infrastructure for Huawei's Ascend platform and described joint work on a system using 128 Ascend 950 chips.
• October 20, 2026: Details emerged of Huawei engineers incorporating DeepSeek's requirements into future chip designs.
• By the end of 2026: DeepSeek reportedly aims to begin model training using Ascend 950DT processors.
• First quarter of 2027: Huawei says Ascend 960DT will be available; DeepSeek is reportedly expected to receive priority access.
• Third quarter of 2027: Huawei says Ascend 960PR will be ready, followed by Ascend 970 in 2028 and Ascend 980 in 2029.

Huawei describes the 960DT schedule as three quarters ahead of its original roadmap. A company spokesperson also gave a previously planned launch date of the third quarter of 2027, which would make the move to the first quarter an acceleration of two quarters. Both descriptions point to the same new availability window.

David Wang, Huawei's deputy chairman and rotating chairman, outlined the pace the company intends to maintain in his September keynote.

"We're evolving our Ascend chip series on a one-generation-a-year cycle," said Wang.

The schedule gives developers a sequence of hardware targets for their software work. For DeepSeek, the nearer deadline is getting models running effectively on Ascend 950 hardware before the newer processors arrive.

Why the Programming Tools Matter

DeepSeek's September 30 announcement described programming infrastructure for Ascend, including TileLang and libraries for computation and communication. The company said Huawei provided full support, and the partners jointly developed a supernode solution based on 128 Ascend 950 chips.

A supernode groups processors so they can work closely together. The libraries supply reusable software for calculations and for passing information between chips, reducing the amount of basic infrastructure that developers must write themselves.

TileLang is a programming language designed to help developers express AI calculations efficiently. DeepSeek said it can simplify code and improve development efficiency, describing it as offering a simpler programming model than Nvidia's CUDA.

CUDA is central to Nvidia's position because developers use its programming tools and software libraries to run workloads on Nvidia processors. Moving an AI system to another chip involves adapting that software as well as obtaining new hardware.

DeepSeek's decision to make its Ascend infrastructure open source allows other developers to inspect and adapt it. The practical attraction is shared work: improvements to common tools can help more than one model developer use the same processor platform.

Huawei says its wider Ascend ecosystem now supports more than 90 major external open source projects, including PyTorch, Triton, vLLM and veRL. It also says Ascend is officially supported as a PyTorch accelerator backend, giving developers using that machine learning framework another route to Huawei hardware.

The Performance Gap Is Still Large

Research institute Epoch AI estimates that Nvidia's B300 chips deliver roughly seven times the raw arithmetic performance of Huawei's Ascend 950 processors. That comparison puts a number on the challenge facing DeepSeek and Huawei as they try to make domestic hardware suitable for the most demanding training jobs.

Raw arithmetic performance measures how much calculation a processor can perform. The time needed to train a complete model also depends on memory, communication, software efficiency and whether the whole system keeps running reliably.

Training a model at the leading edge of AI capability could require more than 10,000 Huawei chips operating together for weeks, according to the account of DeepSeek's plans. Producing enough chips and keeping such a large installation working are therefore central parts of the project.

Huawei says the Ascend 960 generation will double performance as planned. The company is also investing in ways to connect many processors efficiently, making the design of the whole computer an important part of its effort to compete with Nvidia.

Huawei's Answer Is a Larger Shared Computer

Huawei's Atlas 960E SuperPoD can scale to 4,096 neural processing units, or NPUs, according to the company. An NPU is a processor designed for AI calculations. Huawei says the system provides 8 EFLOPS of FP8 computing performance and up to one petabyte of high bandwidth memory.

In simpler terms, Huawei is proposing a tightly connected group of AI processors with a large shared pool of fast memory. FP8 refers to an eight bit numerical format used for suitable AI calculations, while an exaflop represents one quintillion arithmetic operations per second.

Huawei defines a SuperPoD as multiple computing nodes connected through fast links, with unified memory addressing so that they function like one logical computer. Its UnifiedBus technology connects computing, storage and other components within that broader system.

Huawei says communication accounts for more than 40% of training time in traditional server architectures used for large clusters. Its Markov Lab simulations found that a cluster containing 100,000 NPUs, assembled from SuperPoDs of about 4,000 NPUs, could achieve 2.75 times the computing utilization of a cluster built from servers containing eight NPUs each.

The result is a Huawei simulation, and it helps explain the company's design priority: getting processors to spend more time calculating and less time waiting for one another.

Reading the Different System Sizes

Huawei has discussed several scales of computing equipment. Its Atlas 950 SuperCluster has been described as connecting up to 256,000 accelerator cards. The September announcement describes a newer architecture connecting up to 512,000 NPUs, or up to one million with an expanded network arrangement.

Those cluster figures refer to collections of interconnected systems. The 4,096 NPU specification refers to a single Atlas 960E SuperPoD within Huawei's infrastructure plans.

China technology analyst Rui Ma also highlighted a change between a previously stated Atlas 960 SuperPoD configuration of 15,488 chips and the newly announced system containing 4,096. Huawei's current official specification names the latter system as the Atlas 960E SuperPoD.

For buyers, the practical task is matching a particular processor generation and system configuration to the intended workload. A larger advertised network brings more processors into reach, while the speed and reliability of their connections determine how effectively they work together.

Power, Reliability and the Test of Real Training

Huawei says the Atlas 960E uses 5,500 Hi-ONE optical interconnect units in place of the 48,000 optical modules that a traditional connection arrangement would require. Its near packaged optics technology uses light to carry data through compact connections close to the computing hardware.

The company claims this design reduces power consumption by more than 550 kilowatts, doubles the system's operating time without a fault and achieves 99.8% availability. These are Huawei's stated specifications for its system.

DeepSeek's proposed training work would test the relationship between chips, software and connections over sustained workloads. A training run lasting weeks requires the entire installation to keep exchanging data and making progress, not simply to reach a high calculation rate briefly.

Huawei says more than 40 models have already been trained natively on Ascend and its CANN software platform. CANN, short for Compute Architecture for Neural Networks, supplies core software that helps AI applications use Ascend processors.

DeepSeek's contribution brings a prominent model developer into this effort at both the programming and reported chip design stages. The next milestones are its planned use of Ascend 950DT by the end of 2026 and Huawei's promised 960DT availability in the first quarter of 2027. Those steps will show how quickly the partnership can move from tools and design work to sustained training on Chinese hardware.

Key Points

• DeepSeek is reportedly helping Huawei shape future AI chips, including their calculation and data transfer capabilities.
• The companies have already announced programming tools and joint work on a system using 128 Ascend 950 chips.
• DeepSeek reportedly aims to begin training with Ascend 950DT by the end of 2026.
• Huawei says Ascend 960DT will be available in the first quarter of 2027 and Ascend 960PR in the third quarter.
• Epoch AI estimates Nvidia B300 has roughly seven times the raw arithmetic performance of Ascend 950.
• Huawei's response combines newer chips, open software and larger connected systems, including the Atlas 960E SuperPoD with up to 4,096 NPUs.